发明名称 |
Semiconductor device including switch electrically connected to signal line |
摘要 |
To suppress variation of a signal in a semiconductor device. By suppressing the variation, formation of a stripe pattern in displaying an image on a semiconductor device can be suppressed, for example. A distance between two adjacent signal lines which go into a floating state in different periods (G1) is longer than a distance between two adjacent signal lines which go into a floating state in the same period (G0, G2). Consequently, variation in potential of a signal line due to capacitive coupling can be suppressed. For example, in the case where the signal line is a source signal line in an active matrix display device, formation of a stripe pattern in a displayed image can be suppressed. |
申请公布号 |
US8796785(B2) |
申请公布日期 |
2014.08.05 |
申请号 |
US201113005232 |
申请日期 |
2011.01.12 |
申请人 |
Semiconductor Energy Laboratory Co., Ltd. |
发明人 |
Shishido Hideaki |
分类号 |
H01L29/76;H01L29/94;H01L31/062;H01L31/113;H01L31/119;H01L33/00;H01L27/10;H01L29/04;H01L31/036 |
主分类号 |
H01L29/76 |
代理机构 |
Nixon Peabody LLP |
代理人 |
Nixon Peabody LLP ;Costellia Jeffrey L. |
主权项 |
1. A semiconductor device comprising:
first to n-th switches (n is a natural number of 2 or more) configured to be turned on in a first period and turned off in a second period; (n+1)-th to m-th switches (m is a natural number of n+2 or more) configured to be turned off in the first period and turned on in the second period; first to n-th signal lines; and (n+1)-th to m-th signal lines, wherein a signal is supplied to the first signal line in the first period through the first switch, and the first signal line is in a floating state in the second period, wherein a signal is supplied to the n-th signal line in the first period through the n-th switch, and the n-th signal line is in a floating state in the second period, wherein the (n+1)-th signal line is in a floating state in the first period, and a signal is supplied to the (n+1)-th signal tine in the second period through the (n+1)-th switch, wherein the m-th signal line is in a floating state in the first period, and a signal is supplied to the m-th signal line in the second period through the m-th switch, wherein the first to m-th signal lines are parallel or approximately parallel, wherein a distance between the n-th signal line and the (n+1)-th signal line is longer than a distance between the (n−1)-th signal line and the n-th signal line and is longer than a distance between the (n+1)-th signal line and the (n+2)-th signal line. |
地址 |
Kanagawa-ken JP |