System and method for increased efficiency PCI express transaction

摘要

A system and method using new PCI Express transaction layer packet headers so that unchanged header information within a burst of transactions does not need to be re-transmitted. After the first full packet header of a burst is sent, subsequent packet headers in the burst are smaller. Thus, more reduced headers can be transmitted over time with a resulting increased efficiency. Both sides of the PCI Express transaction must support this system and method for this approach to be enabled. Once enabled, both the PCI Express transmitter and receiver can use the regular full header PCI Express packets as well as the reduced header packets.

主权项

1. A method for transmitting a packet stream from a source to a destination, comprising:
forming a first packet having a first packet type and a first header field; and forming a second packet having a second packet type, wherein the second packet type is a reduced header type associated with the first packet type, and a second header field is not included in the second packet when the second header field is of the same type as and of equal value to the first header field, wherein the second packet includes in its reduced header one of: a 16-bit address field associated with a memory read transaction, a 14-bit address field together with a 2-bit indication of power-of-2 byte memory alignment, a 24-bit address field associated with a memory write transaction, or a 22-bit address field together with a 2-bit indication of power-of-2 byte memory alignment.