| 发明名称 | Level conversion circuit and semiconductor device | ||
| 摘要 | A first conversion circuit converts a first clock signal based on a signal level of a first voltage into a second clock signal based on a signal level of a second voltage. A flip-flop circuit supplied with the first voltage as an operation voltage latches and outputs a signal, which is based on the signal level of the first voltage, in accordance with the first clock signal. A second conversion circuit supplied with the second voltage as an operation voltage converts a signal level of an input signal, which is based on an output signal of the flip-flop circuit, into the signal level of the second voltage in synchronization with the second clock signal. | ||
| 申请公布号 | US8797085(B2) | 申请公布日期 | 2014.08.05 |
| 申请号 | US201113329775 | 申请日期 | 2011.12.19 |
| 申请人 | Fujitsu Semiconductor Limited | 发明人 | Kakamu Tomoya;Suzuki Hisao;Sekido Yuji |
| 分类号 | H03L5/00 | 主分类号 | H03L5/00 |
| 代理机构 | Fujitsu Patent Center | 代理人 | Fujitsu Patent Center |
| 主权项 | 1. A level conversion circuit comprising: a first conversion circuit that converts a first clock signal based on a signal level of a first voltage into a second clock signal based on a signal level of a second voltage; a flip-flop circuit supplied with the first voltage as an operation voltage, wherein the flip-flop circuit latches and outputs a signal, which is based on the signal level of the first voltage, in accordance with the first clock signal; and a second conversion circuit including a converter supplied with the second voltage as an operation voltage and supplied with the second clock signal, wherein the converter converts a signal level of an input signal, which is based on an output signal of the flip-flop circuit, into the signal level of the second voltage in synchronization with the second clock signal, anda latch circuit that latches the signal level of the second voltage. | ||
| 地址 | Yokohama JP | ||