Chipset agnostic apparatus and method for serial communication bus port disablement

摘要

An information handling system (IHS) includes a host computer with a downstream facing host computer serial communication bus port and a serial communication bus host controller, wherein the controller is configured to detect a serial communication bus device connected to the downstream facing host computer serial communication bus port, wherein the serial communication bus device has a pull-up resistor. The IHS further includes a circuit disposed between the serial communication bus host controller and the downstream facing host computer serial communication bus port, the circuit configured to disable the downstream facing host computer serial communication bus port and comprising at least one tri-state buffer.

主权项

1. An information handling system (IHS) comprising:
a host computer comprising a downstream facing host computer serial communication bus port and a serial communication bus host controller in communication with the downstream facing host computer serial communication bus port; the serial communication bus host controller in communication with the downstream facing host computer serial communication bus port via a serial communication bus+ data line and a serial communication bus− data line; a first tri-state buffer connected to the serial communication bus+ data line; a second tri-state buffer connected to the serial communication bus− data line; and a circuit disposed between the serial communication bus host controller and the downstream facing host computer serial communication bus port, the circuit operable to disable the downstream facing host computer serial communication bus port from detecting presence of a peripheral device directly coupled to the serial communication bus port.