Poly-phase filter, and a single-side band mixer including the same

摘要

A 4-phase filter includes four filter units including resistors and capacitors which inputs input signals, and provides the input signal via a switch buffer to a secondary capacitor provided in parallel to a primary capacitance of each filter unit, thus enabling a shift of an operational frequency band according to whether or not the switch buffer is in an output-high-impedance state.

主权项

1. A poly-phase filter inputting an input signal and outputting first-fourth 4-phase output signals, comprising:
first-fourth resistors, each of which has an input terminal and an output terminal; a first primary capacitor provided between the output terminal of the first resistor and the input terminal of the fourth resistor; a second primary capacitor provided between the output terminal of the second resistor and the input terminal of the first resistor; a third primary capacitor provided between the output terminal of the third resistor and the input terminal of the second resistor; a fourth primary capacitor provided between the output terminal of the fourth resistor and the input terminal of the third resistor; an input buffer which inputs and outputs to the input terminals of the first-fourth resistors the input signal; a first secondary capacitor which is connected to the output terminal of the first resistor in parallel to the first primary capacitor; a first switch buffer which inputs and outputs to the first secondary capacitor the input signal being input to the input terminal of the fourth resistor; a second secondary capacitor which is connected to the output terminal of the second resistor in parallel to the second primary capacitor; a second switch buffer which inputs and outputs to the second secondary capacitor the input signal being input to the input terminal of the first resistor; a third secondary capacitor which is connected to the output terminal of the third resistor in parallel to the third primary capacitor; a third switch buffer which inputs and outputs to the third secondary capacitor the input signal being input to the input terminal of the second resistor; a fourth secondary capacitor which is connected to the output terminal of the fourth resistor in parallel to the fourth primary capacitor; and a fourth switch buffer which inputs and outputs to the fourth secondary capacitor the input signal being input to the input terminal of the third resistor, wherein the first-fourth output signals are respectively output from the output terminals of the first-fourth resistors, and the first-fourth switch buffers are controlled, in response to a switching signal, to be either output-high-impedance state or not.