发明名称 DIGITAL SIGNAL PROCESSING FOR PLC COMMUNICATIONS HAVING COMMUNICATION FREQUENCIES.
摘要 <p>Aspects of the present disclosure are directed toward receiver devices and methods of using receiver devices. One such method includes converting, using an analog-to-digital converter (ADC), and an analog input signal from power distribution lines that carry power using alternating current (AC) to a digital form. This input digital signal can be an oversampled digital signal, where the digital signal is oversampled relative to downstream processing (e.g., FFT-based processing). A processing circuit(s) can then be used to decimate the input digital signal according to a decimation rate. A reference signal can be generated by the processing circuit that is responsive to the decimation rate. The processing circuit can also be used to detect a change in a phase difference between the AC and reference signal and to modify, in response to detecting a change in the phase difference, the decimation rate to counteract the detected change in the phase difference.</p>
申请公布号 MX2014007440(A) 申请公布日期 2014.08.01
申请号 MX20140007440 申请日期 2012.12.14
申请人 LANDIS+GYR TECHNOLOGIES, LLC 发明人 CHAD WOLTER;STUART L. HAUG;BRYCE D. JOHNSON
分类号 G05B11/01 主分类号 G05B11/01
代理机构 代理人
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