SEMICONDUCTOR MEMORY DEVICE

摘要

A control circuit is configured to perform, when a plurality of variable resistance elements connected to a selected first wiring line are selected, a read operation to sense a voltage of the selected first wiring line. The control circuit is configured to adjust, according to the voltage of the selected first wiring line sensed in the read operation, a voltage to be applied to the selected first wiring line in a reset operation or a set operation. The reset operation is an operation to increase resistance of a variable resistance element. The set operation is an operation to decrease resistance of a variable resistance element.

主权项

1. A semiconductor memory device comprising:
a memory cell array comprising a plurality of memory cells disposed at intersections of a plurality of first wiring lines and a plurality of second wiring lines, each memory cell comprising a variable resistance element; and a control circuit configured to perform, when a plurality of variable resistance elements connected to a selected first wiring line are selected, a read operation to sense a voltage of the selected first wiring line, the control circuit also being configured to adjust, according to the voltage of the selected first wiring line sensed in the read operation, a voltage to be applied to the selected first wiring line in a reset operation or a set operation, the reset operation being an operation to increase resistance of the variable resistance element, and the set operation being an operation to decrease resistance of the variable resistance element.