FLATTENED SUBSTRATE SURFACE FOR SUBSTRATE BONDING

摘要

Methods for bonding substrate surfaces, bonded substrate assemblies, and design structures for a bonded substrate assembly. Device structures of a product chip are formed using a first surface of a device substrate. A wiring layer of an interconnect structure for the device structures is formed on the product chip. The wiring layer is planarized. A temporary handle wafer is removably bonded to the planarized wiring layer. In response to removably bonding the temporary handle wafer to the planarized first wiring layer, a second surface of the device substrate, which is opposite to the first surface, is bonded to a final handle substrate. The temporary handle wafer is then removed from the assembly.

主权项

1. A bonded substrate assembly comprising:
a device substrate including a first surface, a second surface opposite to the first surface, a plurality of device structures on the first surface, and an interconnect structure for the device structures, the interconnect structure including an interlayer dielectric layer with a top surface, a first conductive feature projecting above the top surface, and a second conductive feature projecting above the top surface, the first and second conductive features each having a height measured relative to the top surface of the interlayer dielectric layer; a final handle substrate bonded to the second surface of the device substrate; and at least one insulator layer on the top surface of the interlayer dielectric layer, the at least one insulator layer having a planar top surface and a thickness greater than the height of the first and second conductive features.