发明名称 SYSTEMS AND METHODS FOR PRODUCING FLAT SURFACES IN INTERCONNECT STRUCTURES
摘要 Methods and apparatus for forming a semiconductor device are provided which may include any number of features. One feature is a method of forming an interconnect structure that results in the interconnect structure having a co-planar or flat top surface. Another feature is a method of forming an interconnect structure that results in the interconnect structure having a surface that is angled upwards greater than zero with respect to a top surface of the substrate. The interconnect structure can comprise a damascene structure, such as a single or dual damascene structure, or alternatively, can comprise a silicon-through via (TSV) structure.
申请公布号 US2014210102(A1) 申请公布日期 2014.07.31
申请号 US201414199181 申请日期 2014.03.06
申请人 Tessera, Inc. 发明人 Uzoh Cyprian;Oganesian Vage;Mohammed liyas
分类号 H01L23/48 主分类号 H01L23/48
代理机构 代理人
主权项
地址 San Jose CA US