| 发明名称 |
CONDUCTIVE LINE ROUTING FOR MULTI-PATTERNING TECHNOLOGY |
| 摘要 |
A method comprises: forming a plurality of reference voltage patterns in a first layer of a semiconductor substrate using a first mask, the reference voltage patterns including alternating first reference voltage patterns and second reference voltage patterns; and forming a plurality of signal patterns in the first layer of the semiconductor substrate using a second mask, ones of the plurality of signal patterns located between successive pairs of reference voltage patterns. |
| 申请公布号 |
US2014210100(A1) |
申请公布日期 |
2014.07.31 |
| 申请号 |
US201313755326 |
申请日期 |
2013.01.31 |
| 申请人 |
TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD. |
发明人 |
XIAO You-Cheng;CHAN Wei Min;HSIEH Ken-Hsien |
| 分类号 |
H01L21/768;G06F17/50;H01L23/48 |
主分类号 |
H01L21/768 |
| 代理机构 |
|
代理人 |
|
| 主权项 |
1. A method, comprising:
forming a plurality of reference voltage patterns in a first layer of a semiconductor substrate using a first mask, the reference voltage patterns including alternating first reference voltage patterns and second reference voltage patterns; forming a plurality of signal patterns in the first layer of the semiconductor substrate using a second mask, ones of the plurality of signal patterns located between successive pairs of reference voltage patterns. |
| 地址 |
Hsin-Chu TW |
