发明名称 NON-VOLATILE MEMORY DEVICE AND METHOD OF MANUFACTURING THE SAME
摘要 According to one embodiment, dry etching is performed so that an upper-layer wiring material layer, a memory-layer constituting layer, and an interlayer insulating film are processed to form a pattern including a line-and-space pattern extending in a second direction and a dummy pattern connecting line patterns constituting the line-and-space pattern in a memory cell formation region and an upper-layer wiring hookup region. Then, the dummy pattern is removed.
申请公布号 US2014209849(A1) 申请公布日期 2014.07.31
申请号 US201313945342 申请日期 2013.07.18
申请人 KABUSHIKI KAISHA TOSHIBA 发明人 OKAJIMA Mutsumi
分类号 H01L45/00 主分类号 H01L45/00
代理机构 代理人
主权项 1. A method of manufacturing a non-volatile memory device including a plurality of first wirings extending in a first direction, a plurality of second wirings extending in a second direction intersecting the first direction, and a non-volatile memory cell array layer where a plurality of non-volatile memory cells are arranged at intersection portions of the first wirings and the second wirings so to be interposed, the method comprising: sequentially stacking a first wiring material layer which is to be the first wiring and a memory-layer constituting layer constituting the non-volatile memory cell above a substrate; performing dry etching so that the memory-layer constituting layer and the first wiring material layer are etched to form a first pattern having a first line-and-space pattern extending in the first direction in a memory cell formation region and a first wiring hookup region adjacent in the first direction of the memory cell formation region and so that the memory-layer constituting layer and the first wiring material layer are removed in a second wiring hookup region adjacent in the second direction of the memory cell formation region; forming an interlayer insulating film to be embedded between line patterns constituting the first line-and-space pattern in the memory cell formation region and the first wiring hookup region and forming an interlayer insulating film in a region which is removed by the dry etching in the second wiring hookup region; forming a second wiring material layer which is to be the second wiring on the interlayer insulating film and the memory-layer constituting layer; performing dry etching so that the second wiring material layer, the memory-layer constituting layer, and the interlayer insulating film are processed to form a second pattern including a second line-and-space pattern extending in the second direction and a first dummy pattern connecting line patterns constituting the second line-and-space pattern in the memory cell formation region and the second wiring hookup region and so that the second wiring material layer and the memory-layer constituting layer are removed in the first wiring hookup region; and removing the first dummy pattern.
地址 Minato-ku JP