发明名称 |
FinFETs and Methods for Forming the Same |
摘要 |
A method includes recessing isolation regions, wherein a portion of a semiconductor strip between the isolation regions is over top surfaces of the recessed isolation regions, and forms a semiconductor fin. A dummy gate is formed to cover a middle portion of the semiconductor fin. An Inter-Layer Dielectric (ILD) is formed to cover end portions of the semiconductor fin. The dummy gate is then removed to form a first recess, wherein the middle portion is exposed to the first recess. The middle portion of the semiconductor fin is removed to form a second recess. An epitaxy is performed to grow a semiconductor material in the second recess, wherein the semiconductor material is between the end portions. A gate dielectric and a gate electrode are formed in the first recess. The gate dielectric and the gate electrode are over the semiconductor material. |
申请公布号 |
US2014213031(A1) |
申请公布日期 |
2014.07.31 |
申请号 |
US201313750883 |
申请日期 |
2013.01.25 |
申请人 |
TAIWAN SEMICONDUCTOR MANUFACTURING, LTD. |
发明人 |
Lin Hung-Ta;Chen Meng-Ku;Chang Huicheng |
分类号 |
H01L29/66 |
主分类号 |
H01L29/66 |
代理机构 |
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代理人 |
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主权项 |
1. A method comprising:
recessing isolation regions, wherein a portion of a semiconductor strip between the isolation regions is over top surfaces of the recessed isolation regions, and forms a semiconductor fin; forming a dummy gate to cover a middle portion of the semiconductor fin; forming an Inter-Layer Dielectric (ILD) to cover end portions of the semiconductor fin, wherein the end portions of the semiconductor fin are on opposite sides of the middle portion; removing the dummy gate to form a first recess, wherein the middle portion is exposed to the first recess; removing the middle portion of the semiconductor fin from the first recess to form a second recess; performing an epitaxy to grow a semiconductor material in the second recess, wherein the semiconductor material is between the end portions; and forming a gate dielectric and a gate electrode in the first recess, wherein the gate dielectric and the gate electrode are over the semiconductor material. |
地址 |
Hsin-Chu TW |