发明名称 |
Adder capable of supporting addition and subtraction |
摘要 |
An adder for supporting multiple data types by controlling a carry propagation is provided. In an example, the adder supports a subtraction operation of a maximum n-bit data types, and includes a plurality of the first addition areas each formed with a predetermined unit number of bits and configured to receive pieces of incoming operand data, and one or more second addition areas each formed between the plurality of the first addition areas and configured to receive pieces of control data based on an operand data type and an operation type. |
申请公布号 |
EP2759926(A1) |
申请公布日期 |
2014.07.30 |
申请号 |
EP20140152909 |
申请日期 |
2014.01.28 |
申请人 |
SAMSUNG ELECTRONICS CO., LTD |
发明人 |
YU, HYEONG-SEOK;KIM, SUK-JIN |
分类号 |
G06F7/507 |
主分类号 |
G06F7/507 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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