发明名称 |
DIGITAL PROCESSOR HAVING INSTRUCTION SET WITH COMPLEX EXPONENTIAL NON-LINEAR FUNCTION |
摘要 |
Maximum likelihood bit-stream generation and detection techniques are provided using the M-algorithm and Infinite Impulse Response (IIR) filtering. The M-Algorithm is applied to a target input signal X to perform Maximum Likelihood Sequence Estimation on the target input signal X to produce a digital bit stream B, such that after filtering by an IIR filter, the produced digital stream Y produces an error signal satisfying one or more predefined requirements. The predefined requirements comprise, for example, a substantially minimum error. In an exemplary bit detection implementation, the target input signal X comprises an observed analog signal and the produced digital stream Y comprises a digitized output of a receive channel corresponding to a transmitted bit stream. In an exemplary bit stream generation implementation, the target input signal X comprises a desired transmit signal and the produced digital stream Y comprises an estimate of the desired transmit signal. |
申请公布号 |
EP2758867(A2) |
申请公布日期 |
2014.07.30 |
申请号 |
EP20120844423 |
申请日期 |
2012.10.26 |
申请人 |
LSI CORPORATION |
发明人 |
AZADET, KAMERAN;MOLINA, ALBERT;OTHMER, JOSEPH, H.;VENKATARAGHAVAN, PARAKALAN;YU, MENG-JIN;WILLIAMS, JOSEPH |
分类号 |
G06F17/15;G06F1/03;G06F9/30 |
主分类号 |
G06F17/15 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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