发明名称 Bias circuit
摘要 <p>Proposed is a bias circuit for a transistor in a C class amplifier. The bias circuit comprises: a class AB amplifier bias voltage generating means adapted to generate a bias voltage at an output terminal; and a transistor connected between the output terminal and a first reference voltage, the control terminal of the transistor being connected to a second reference voltage via a switch. Closure of the switch connects the second reference voltage to the control terminal of the transistor to cause a shift in the bias voltage generated by the class AB amplifier bias voltage generating means to achieve a predetermined class C bias voltage at the output terminal.</p>
申请公布号 EP2760130(A1) 申请公布日期 2014.07.30
申请号 EP20130290021 申请日期 2013.01.28
申请人 NXP B.V. 发明人 BOUNY, JEAN-JACQUES
分类号 H01L23/66;H03F1/02;H03F1/30;H03F3/19 主分类号 H01L23/66
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