发明名称 Offset and delay cancellation circuit for a switching DC-DC power supply
摘要 A control circuit of a switching DC-DC power supply includes a feedback circuit detecting an output voltage of the power supply to generate a feedback signal, an error comparator detecting an error between the output voltage and a design value of the output voltage, a control logic circuit generating a control signal according to the error for regulating the output voltage, and an offset and delay cancellation circuit generating an offset adjust signal according to the feedback signal and a second reference voltage for adjusting an offset of the error comparator to pull the output voltage toward the design value.
申请公布号 US8791678(B2) 申请公布日期 2014.07.29
申请号 US201113188867 申请日期 2011.07.22
申请人 Richtek Technology Corp. 发明人 Tai Ting-Jung;Yang Chih-Hao;Chen An-Tung
分类号 H02M3/156 主分类号 H02M3/156
代理机构 Muncy, Geissler, Olds & Lowe, P.C. 代理人 Muncy, Geissler, Olds & Lowe, P.C.
主权项 1. A control circuit of a switching DC-DC power supply having an output terminal for providing an output voltage, the control circuit comprising: a feedback circuit connected to the output terminal, detecting the output voltage to generate a feedback signal; an error comparator connected to the feedback circuit, comparing the feedback signal with a first reference voltage to generate a comparison signal; a control logic circuit connected to the error comparator, generating a control signal according to the comparison signal for the power supply to regulate the output voltage; and an offset and delay cancellation circuit connected to the feedback circuit and the error comparator, generating an offset adjust signal according to the feedback signal and a second reference voltage for adjusting an offset of the error comparator; wherein the offset and delay cancellation circuit comprises: an error transconductor connected to the feedback circuit, generating an error current according to a difference between the feedback signal and the second reference voltage; and a sample-and-hold circuit connected to the error transconductor and the error comparator, sampling and holding the error current to generate the offset adjust signal.
地址 Hsinchu TW