发明名称 |
Semiconductor storage device |
摘要 |
A memory includes a semiconductor substrate. Magnetic tunnel junction elements are provided above the semiconductor substrate. Each of the magnetic tunnel junction elements stores data by a change in a resistance state, and the data is rewritable by a current. Cell transistors are provided on the semiconductor substrate. Each of the cell transistors is in a conductive state when the current is applied to the corresponding magnetic tunnel junction element. Gate electrodes are included in the respective cell transistors. Each of the gate electrodes controls the conductive state of the corresponding cell transistor. In active areas, the cell transistors are provided, and the active areas extend in an extending direction of intersecting the gate electrodes at an angle of (90−atan(⅓)) degrees. |
申请公布号 |
US8791535(B2) |
申请公布日期 |
2014.07.29 |
申请号 |
US201313970421 |
申请日期 |
2013.08.19 |
申请人 |
Kabushiki Kaisha Toshiba |
发明人 |
Asao Yoshiaki |
分类号 |
H01L29/82 |
主分类号 |
H01L29/82 |
代理机构 |
Knobbe, Martens, Olson & Bear LLP |
代理人 |
Knobbe, Martens, Olson & Bear LLP |
主权项 |
1. A semiconductor storage device comprising:
a semiconductor substrate; a plurality of active areas formed on the semiconductor substrate, extending in a first direction; a plurality of magnetic tunnel junction elements above the semiconductor substrate, each magnetic tunnel junction element storing data by a change in a resistance state, the data being rewritable by a current; a plurality of cell transistors formed in the plurality of active areas, each cell transistor being in a conductive state according to an applied voltage; and a plurality of gate electrodes included in the respective cell transistors, each gate electrode controlling the conductive state of the corresponding cell transistor, wherein the plurality of active areas and the plurality of gate electrodes intersect at an angle of (90−atan(⅓)) degrees. |
地址 |
Tokyo JP |