发明名称 |
Semiconductor device and method of forming micro-vias partially through insulating material over bump interconnect conductive layer for stress relief |
摘要 |
A semiconductor device has a semiconductor die and first insulating layer formed over the semiconductor die. A plurality of first micro-vias can be formed in the first insulating layer. A conductive layer is formed in the first micro-openings and over the first insulating layer. A second insulating layer is formed over the first insulating layer and conductive layer. A portion of the second insulating layer is removed to expose the conductive layer and form a plurality of second micro-openings in the second insulating layer over the conductive layer. The second micro-openings can be micro-vias, micro-via ring, or micro-via slots. Removing the portion of the second insulating layer leaves an island of the second insulating layer over the conductive layer. A bump is formed over the conductive layer. A third insulating layer is formed in the second micro-openings over the bump. The second micro-openings provide stress relief. |
申请公布号 |
US8791008(B2) |
申请公布日期 |
2014.07.29 |
申请号 |
US201213426552 |
申请日期 |
2012.03.21 |
申请人 |
STATS ChipPAC, Ltd. |
发明人 |
Lin Yaojian;Chen Kang |
分类号 |
H01L21/44 |
主分类号 |
H01L21/44 |
代理机构 |
Patent Law Group: Atkins & Associates, P.C. |
代理人 |
Atkins Robert D.;Patent Law Group: Atkins & Associates, P.C. |
主权项 |
1. A method of making a semiconductor device, comprising:
providing a semiconductor die; forming a first insulating layer over the semiconductor die; forming a conductive layer over the first insulating layer; forming a second insulating layer over the first insulating layer and conductive layer; removing a portion of the second insulating layer to expose the conductive layer and form a plurality of first micro-vias partially through the second insulating layer over the conductive layer; and forming a bump over the conductive layer, wherein the first micro-vias provide stress relief. |
地址 |
Singapore SG |