发明名称 |
Semiconductor device having a multilayer interconnection structure |
摘要 |
A semiconductor device includes first and second conductor patterns embedded in a first interlayer insulation film and a third conductor pattern embedded in a second interlayer insulation film, the third conductor pattern including a main part and an extension part, the extension part being electrically connected to the first conductor pattern by a first via-plug, the extension part having a branched pattern closer to the main part compared with the first conductor pattern, the branched pattern making a contact with the second conductor pattern via a second via-plug, each of the main part, extension part including the branched pattern, first via-plug and second via-plug forming a damascene structure. |
申请公布号 |
US8791570(B2) |
申请公布日期 |
2014.07.29 |
申请号 |
US201213483044 |
申请日期 |
2012.05.29 |
申请人 |
Fujitsu Semiconductor Limited |
发明人 |
Watanabe Kenichi;Nakamura Tomoji;Otsuka Satoshi |
分类号 |
H01L29/04 |
主分类号 |
H01L29/04 |
代理机构 |
Fujitsu Patent Center |
代理人 |
Fujitsu Patent Center |
主权项 |
1. A semiconductor device comprising:
a substrate; a first interlayer insulation film formed above said substrate; a first conductor pattern formed in said first interlayer insulation film and a second conductor pattern formed in said first interlayer insulation film, said second conductor pattern being separated from said first conductor pattern in a plan view; a second interlayer insulation film formed above said first insulation film; a third conductor pattern formed in said second interlayer insulation film; an extension part formed in said second interlayer insulation film and connected to said third conductor pattern in a plan view, a width of said extension part being narrower than a width of said third conductor pattern; a first via-plug formed on said first conductor pattern and under said extension part; a branched pattern formed in said second interlayer insulation film and connected to said extension part in a plan view; and a second via-plug formed on said second conductor pattern and under said branched pattern. |
地址 |
Yokohama JP |