Termination of secure execution mode in a microprocessor providing for execution of secure code

摘要

An apparatus including a microprocessor, a system memory, and a secure non-volatile memory. The microprocessor is mounted to a motherboard, and executes non-secure application programs and a secure application program. The system memory stores non-secure application programs, and is mounted to the motherboard and coupled to the microprocessor via a system bus. The microprocessor has secure execution mode logic that detects execution of a secure execution mode return event, and that terminates a secure execution mode within the microprocessor, where the secure execution mode exclusively supports execution of the secure application program. The secure non-volatile memory is coupled to the microprocessor via a private bus and stores the secure application program prior to termination of the secure execution mode, where transactions over the private bus between the microprocessor and the secure non-volatile memory are isolated from the system bus and corresponding system bus resources within the microprocessor.

主权项

1. An apparatus providing for a secure execution environment, comprising:
a microprocessor, mounted to a motherboard, that executes non-secure application programs and a secure application program, said microprocessor comprising:
secure execution mode logic, that detects execution of a secure execution mode return event, and that terminates a secure execution mode within said microprocessor, wherein said secure execution mode exclusively supports execution of said secure application program; a system memory, mounted to said motherboard and coupled to said microprocessor via a system bus, said system memory having said non-secure application programs stored therein, wherein said system memory transfers said non-secure application programs to said microprocessor; and a secure non-volatile memory, coupled to said microprocessor via a private bus, that stores said secure application program prior to termination of said secure execution mode, wherein transactions over said private bus between said microprocessor and said secure non-volatile memory are isolated from said system bus and corresponding system bus resources within said microprocessor.