发明名称 Motherboard with voltage-state display system
摘要 A motherboard includes a central processing unit (CPU), a drive, and a voltage-state display system to display a voltage mode of the CPU. The voltage-state display system includes a power management chip, a first transistor, a second transistor, a first light emitting diode (LED), and a second LED. A first phase output terminal of the power management chip is connected to the first LED through the first transistor. A second phase output terminal of the power management chip is connected to the second LED through the second transistor. The LEDs indicate the voltage mode of the CPU.
申请公布号 US8793517(B2) 申请公布日期 2014.07.29
申请号 US201213400766 申请日期 2012.02.21
申请人 Hong Fu Jin Precision Industry (ShenZhen) Co., Ltd.;Hon Hai Precision Industry Co., Ltd. 发明人 Fu Ying-Bin;Chen Yuan-Xi;Pan Ya-Jun
分类号 G06F1/00;G06F1/26;H01J1/60;H05B37/00;H03K3/017;H03K7/08 主分类号 G06F1/00
代理机构 Novak Druce Connolly Bove + Quigg LLP 代理人 Novak Druce Connolly Bove + Quigg LLP
主权项 1. A motherboard comprising: a voltage-state display system comprising: a first transistor comprising a control terminal, a first terminal grounded, and a second terminal;a second transistor comprising a control terminal, a first terminal grounded, and a second terminal;a first light emitting diode (LED) connected to the second terminal of the first transistor;a second LED connected to the second terminal of the second transistor; anda power management chip comprising: a first phase output terminal connected to the control terminal of the first transistor to output a first pulse width modulation (PWM) signal; anda second phase output terminal connected to the control terminal of the second transistor to output a second PWM signal; a drive connected to the first and second phase output terminals to receive the first and second PWM signals, and output a voltage according to the received first and second PWM signals; and a central processing unit (CPU) connected to the drive to receive the output voltage from the drive, and connected to the power management chip to output a control instruction to the power management chip to denote a voltage mode provided to the CPU, thereby controlling the power management chip to adjust the first and second PWM signals; wherein when the power management chip is in a PS0 state, the first phase output terminal continuously outputs the first PWM signal to the control terminal of the first transistor, and the second phase output terminal continuously outputs the second PWM signal to the control terminal of the second transistor, the first and second LEDs is lit to denote the voltage mode of the CPU is the PS0 mode; when the power management chip is in a PS1 state, the first phase output terminal continuously outputs the first PWM signal to the control terminal of the first transistor, while the second phase output terminal does not output the second PWM signal, the first LED is lit, and the second LED is not lit, to denote the voltage mode of the CPU is the PS1 mode; when the power management chip is in a PS2 state, the first phase output terminal discontinuously outputs the first PWM signal to the control terminal of the first transistor, while the second phase output terminal does not output the second PWM signal, the first LED flickers, and the second LED is not lit, to denote the voltage mode of the CPU is the PS2 mode.
地址 Shenzhen CN