Methods of forming CMOS transistors using tensile stress layers and hydrogen plasma treatment,申请号US201012859644-传众专利搜索

发明名称	Methods of forming CMOS transistors using tensile stress layers and hydrogen plasma treatment
摘要	Methods of forming integrated circuit devices include forming a PMOS transistor having a SiGe channel region therein and then exposing at least a portion of the PMOS transistor to a hydrogen plasma. A tensile stress layer may be formed on the PMOS transistor. The exposing step may include exposing source and drain regions of the PMOS transistor to the hydrogen plasma.
申请公布号	US8790972(B2)	申请公布日期	2014.07.29
申请号	US201012859644	申请日期	2010.08.19
申请人	Samsung Electronics Co., Ltd.;International Business Machines Corporation;GLOBALFOUNDRIES Singapore Pte. Ltd.;Freescale Semiconductor, Inc.	发明人	Jeong Yong-Kuk;Kang Laegu;Sung Kim Nam;Yang Dae-won
分类号	H01L21/336;H01L29/78;H01L29/66;H01L21/8238;H01L29/04;H01L29/10;H01L21/28	主分类号	H01L21/336
代理机构	Myers Bigel Sibley & Sajovec, P.A.	代理人	Myers Bigel Sibley & Sajovec, P.A.
主权项	1. A method of forming an integrated circuit device, comprising: forming a PMOS transistor having a SiGe channel region therein, said forming a PMOS transistor comprising adjusting a position of a substrate such that a crystallographic orientation of the SiGe channel region formed in the substrate is parallel to a <100> crystallographic orientation of the substrate; exposing source and drain regions of the PMOS transistor to a hydrogen plasma; and forming a tensile stress layer on the PMOS transistor, which applies tensile stress to the SiGe channel region, after said exposing.
地址	KR