发明名称 ZERO SUM SIGNALING IN A DIGITAL SYSTEM ENVIRONMENT
摘要 Zero sum signaling schemes utilize coding across data words to allow the use of single-ended buffers while mitigating simultaneous switching noise (SSN) in digital systems. Zero sum signaling may include balanced zero sum coding (target disparity=0) and nearly balanced zero sum coding (target disparity=±d). Zero sum signaling may reduce simultaneous switching noise as compared to single-ended signaling while allowing a reduction in the number of physical channels (e.g. circuit board traces) by nearly a factor of two as compared to differential signaling.
申请公布号 US2014208181(A1) 申请公布日期 2014.07.24
申请号 US201214125292 申请日期 2012.06.08
申请人 Daniel Erik S.;Techentin Robert W. 发明人 Daniel Erik S.;Techentin Robert W.
分类号 H04L1/00;G06F11/10 主分类号 H04L1/00
代理机构 代理人
主权项 1. (canceled)
地址 Rochester MN US