发明名称 |
METHOD AND SYSTEM FOR PROTECTING MEMORY INFORMATION IN A PLATFORM |
摘要 |
A method and system to provide an effective, scalable and yet low-cost solution for Confidentiality, Integrity and Replay protection for sensitive information stored in a memory and prevent an attacker from observing and/or modifying the state of the system. In one embodiment of the invention, the system has strong hardware protection for its memory contents via XTS-tweak mode of encryption where the tweak is derived based on “Global and Local Counters”. This scheme offers to enable die-area efficient Replay protection for any sized memory by allowing multiple counter levels and facilitates using small counter-sizes to derive the “tweak” used in the XTS encryption without sacrificing cryptographic strength. |
申请公布号 |
US2014208109(A1) |
申请公布日期 |
2014.07.24 |
申请号 |
US201113976935 |
申请日期 |
2011.12.28 |
申请人 |
Narendra Trivedi Alpa T.;Durham David M.;Long Men;Chhabra Siddhartha;Savagaonkar Uday R.;Rozas Carlos V. |
发明人 |
Narendra Trivedi Alpa T.;Durham David M.;Long Men;Chhabra Siddhartha;Savagaonkar Uday R.;Rozas Carlos V. |
分类号 |
H04L29/06 |
主分类号 |
H04L29/06 |
代理机构 |
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代理人 |
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主权项 |
1. A processor comprising:
a global counter; a plurality of local counters, wherein a last level of the plurality of local counters is associated with a plurality of Message Authentication Code (MAC) lines; and logic to perform a write operation to a memory address, wherein the logic is to decrypt one of the MAC lines associated with the memory address using a tweak based on one or more of the memory address, the global counter, the local counter associated with the one MAC line, and a counter indication bit to obtain a MAC value. |
地址 |
Hillsboro OR US |