发明名称 Bus arrangement for use in chip of smart card, has encoder producing output bit by combing two input bits for outputs according to bijective imaging of inputs bits on output bits, and outputting output bits to bus lines via outputs
摘要 <p>The arrangement has a bus (200) provided with multiple bus lines (201). An encoder has inputs for the bus lines for receiving input bits, and outputs for the bus lines. The encoder produces each of output bits by combing two of the input bits for the outputs according to bijective imaging of the inputs bits on the output bits, preferably bijective imaging of input bit vectors on output bit vectors, where the imaging corresponds to multiplication of the input bit vectors with a matrix and subsequent addition of the vectors. The encoder outputs the output bits to the bus lines via the outputs. An independent claim is also included for a method for sending data via a bus.</p>
申请公布号 DE102013100572(A1) 申请公布日期 2014.07.24
申请号 DE201310100572 申请日期 2013.01.21
申请人 INFINEON TECHNOLOGIES AG 发明人 GÖTTFERT, RAINER;GAMMEL, BERNDT
分类号 H04L9/00 主分类号 H04L9/00
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