发明名称 |
MEMORY DEVICE AND SEMICONDUCTOR DEVICE |
摘要 |
Provided is a memory device with reduced overhead power. A memory device includes a first circuit retaining data in a first period during which a power supply voltage is supplied; a second circuit saving the data retained in the first circuit in the first period and retaining the data saved from the first circuit in a second period during which the power supply voltage is not supplied; and a third circuit saving the data retained in the second circuit in the second period and retaining the data saved from the second circuit in a third period during which the power supply voltage is not supplied. The third circuit includes a transistor in which a channel formation region is provided in an oxide semiconductor film and a capacitor to which a potential corresponding to the data is supplied through the transistor. |
申请公布号 |
US2014204696(A1) |
申请公布日期 |
2014.07.24 |
申请号 |
US201414160800 |
申请日期 |
2014.01.22 |
申请人 |
Semiconductor Energy Laboratory Co., Ltd. |
发明人 |
Kato Kiyoshi;Ohmaru Takuro;Takahashi Yasuyuki |
分类号 |
G11C5/14 |
主分类号 |
G11C5/14 |
代理机构 |
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代理人 |
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主权项 |
1. A memory device comprising:
a first circuit, the first circuit retaining data in a first period during which a power supply voltage is supplied; a second circuit, the second circuit saving the data retained in the first circuit in the first period and retaining the data in a second period during which the power supply voltage is not supplied; and a third circuit, the third circuit saving the data retained in the second circuit in the second period and retaining the data in a third period during which the power supply voltage is not supplied, wherein the third circuit comprises a first transistor in which a channel formation region is provided in an oxide semiconductor film and a first capacitor to which a first potential corresponding to the data is supplied through the first transistor. |
地址 |
Atsugi-shi JP |