| 发明名称 |
Method Of Semiconductor Integrated Circuit Fabrication |
| 摘要 |
A method of fabricating a semiconductor integrated circuit (IC) is disclosed. The method includes providing a substrate. A patterned adhesion layer is formed on the substrate. A metal layer is deposited on the patterned adhesion layer. An elevated temperature thermal process is applied to agglomerate the metal layer to form a self-forming-metal-feature (SFMF) and a dielectric layer is deposited between SFMFs. |
| 申请公布号 |
US2014203437(A1) |
申请公布日期 |
2014.07.24 |
| 申请号 |
US201313745060 |
申请日期 |
2013.01.18 |
| 申请人 |
Ltd. Taiwan Semiconductor Manufacturing Company, |
发明人 |
Liu Wen-Jiun;Chen Chien-An;Lee Ya-Lien;Su Hung-Wen;Tsai Minghsing;Jang Syun-Ming |
| 分类号 |
H01L23/52;H01L21/768 |
主分类号 |
H01L23/52 |
| 代理机构 |
|
代理人 |
|
| 主权项 |
1. A method for fabricating a semiconductor integrated circuit (IC), the method comprising:
providing a substrate; forming a patterned adhesion layer over the substrate; depositing a metal layer over the patterned adhesion layer and the substrate; applying a thermal process to agglomerate the metal layer to form a self-forming-metal-feature (SFMF) on the patterned adhesion layer, wherein a top portion of the SFMF has an irregular agglomerated surface; and depositing a dielectric layer over the SFMF. |
| 地址 |
US |
