THROUGH SILICON VIAS FOR SEMICONDUCTOR DEVICES AND MANUFACTURING METHOD THEREOF

摘要

The present invention provides a semiconductor wafer, a semiconductor chip and a semiconductor package. The semiconductor wafer includes a first pad, a first inter-layer dielectric and a second pad. The first pad is disposed on a top surface of a semiconductor substrate and has a solid portion and a plurality of through holes. The first inter-layer dielectric covers the first pad. The second pad is disposed on the first inter-layer dielectric and has a solid portion and a plurality of through holes, wherein the through holes of the first pad correspond to the solid portion of the second pad.

主权项

1. A semiconductor wafer, comprising:
a semiconductor substrate defining opposed top and bottom surfaces; active circuitry disposed on the top surface of the substrate, the active circuitry including a plurality of stacked inter-layer dielectrics and plurality of metal interconnect layers which are integrated into the inter-layer dielectrics in spaced relation to each other; a first pad having a solid portion and a plurality of perforations, the first pad being provided in a first one of the metal interconnect layers; and a second pad defining a solid portion, the second pad being provided in second one of the metal interconnect layers and positioned relative to the first pad such that the perforations of the first pad are aligned with respective discrete sections defined by the solid portion of the second pad.