发明名称 |
Chemical Mechanical Polish in the Growth of Semiconductor Regions |
摘要 |
A method includes performing a first planarization step to remove portions of a semiconductor region over isolation regions. The first planarization step has a first selectivity, with the first selectivity being a ratio of a first removal rate of the semiconductor region to a second removal rate of the isolation regions. After the isolation regions are exposed, a second planarization step is performed on the isolation regions and a portion of the semiconductor region between the isolation regions. The second planarization step has a second selectivity lower than the first selectivity, with the second selectivity being a ratio of a third removal rate of the portion of semiconductor region to a fourth removal rate of the isolation regions. |
申请公布号 |
US2014206164(A1) |
申请公布日期 |
2014.07.24 |
申请号 |
US201313748363 |
申请日期 |
2013.01.23 |
申请人 |
TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD. |
发明人 |
Lin Kuo-Yin;Pan Wan-Chun;Chang Hsiang-Pi;Tsai Teng-Chun;Chen Chi-Yuan |
分类号 |
H01L29/66 |
主分类号 |
H01L29/66 |
代理机构 |
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代理人 |
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主权项 |
1. A method comprising:
performing a first planarization step to remove portions of a semiconductor region over isolation regions, wherein the first planarization step has a first selectivity, with the first selectivity being a ratio of a first removal rate of the semiconductor region to a second removal rate of the isolation regions, wherein the first planarization step is finished after the isolation regions are exposed; and after the isolation regions are exposed, performing a second planarization step on the isolation regions and a portion of the semiconductor region between the isolation regions, wherein the second planarization step has a second selectivity lower than the first selectivity, with the second selectivity being a ratio of a third removal rate of the portion of the semiconductor region to a fourth removal rate of the isolation regions. |
地址 |
Hsin-Chu TW |