发明名称 |
Non-volatile Memory Cell Having A Floating Gate And A Coupling Gate With Improved Coupling Ratio Therebetween |
摘要 |
A non-volatile memory cell having a split gate, wherein the floating gate and the coupling/control gate have complimentary non-planar shapes. The shape may be a step shape. An array of such cells and a method of manufacturing the cells are also disclosed. |
申请公布号 |
US2014203343(A1) |
申请公布日期 |
2014.07.24 |
申请号 |
US201214125029 |
申请日期 |
2012.07.16 |
申请人 |
Silicon Storage Technology, Inc. |
发明人 |
Wang Chunming;Qiao Baowei;Zhang Zufa;Zhang Yi;Wang Shiuh Luen;Lu Wen-Juei |
分类号 |
H01L29/788;H01L29/66 |
主分类号 |
H01L29/788 |
代理机构 |
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代理人 |
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主权项 |
1. A non-volatile memory cell comprising:
a semiconductor substrate of a first conductivity type having a top surface; a first region of a second conductivity type in said substrate along the top surface; a second region of the second conductivity type, in said substrate along the top surface, spaced apart from the first region; a channel region between the first region and the second region; a word line gate positioned over a first portion of the channel region, immediately adjacent to the first region, said word line gate spaced apart from the channel region by a first insulating layer; a floating gate positioned over another portion of the channel region, said floating gate having a lower surface separated from the channel region by a second insulating layer, and an upper surface opposite the lower surface; said floating gate having a first side wall adjacent to but separated from the word line gate; and a second side wall opposite the first side wall, wherein said upper surface having a non-planar contour from said first side wall to said second side wall; a coupling gate positioned over the upper surface of the floating gate and insulated therefrom by a third insulating layer, said coupling gate having a lower surface that has a contour that follows the contour of said upper surface of said floating gate; and an erase gate positioned adjacent to the second side wall of the floating gate; said erase gate positioned over the second region and insulated therefrom. |
地址 |
San Jose CA US |