SEMICONDUCTOR DEVICE

摘要

Supply of power to a plurality of circuits is controlled efficiently depending on usage conditions and the like of the circuits. An address monitoring circuit monitors whether a cache memory and an input/output interface are in an access state or not, and performs power gating in accordance with the state of the cache memory and the input/output interface. The address monitoring circuit acquires and monitors an address signal between a signal processing circuit and the cache memory or the input/output interface periodically. When one of the cache memory and the input/output interface is in a standby state and the other is in the access state, power gating is performed on the circuit that is in the standby state.

主权项

1. A semiconductor device comprising:
a signal processing circuit, a cache memory, and an input/output interface electrically connected to a bus line; an address monitoring circuit monitoring whether the signal processing circuit, the cache memory, and the input/output interface are in an access state or not; first to third switches electrically connected to the signal processing circuit, the cache memory, and the input/output interface, respectively, and configured to select whether to supply power to the signal processing circuit, the cache memory, and the input/output interface in response to a power gating control signal; and a power control circuit outputting the power gating control signal in accordance with a state of the signal processing circuit, a state of the cache memory, and a state of the input/output interface which are monitored by the address monitoring circuit.