| 发明名称 |
CHIP STACK WITH ELECTRICALLY INSULATING WALLS |
| 摘要 |
A chip stack is provided and includes two or more chips, a solder joint operably disposed between adjacent ones of the two or more chips, the solder joint occupying about 25-30% or more of an area of the chip stack and insulating walls disposed on at least one of the two or more chips to separate the solder joint from an adjacent solder joint. |
| 申请公布号 |
US2014203428(A1) |
申请公布日期 |
2014.07.24 |
| 申请号 |
US201313745966 |
申请日期 |
2013.01.21 |
| 申请人 |
INTERNATIONAL BUSINESS MACHINES CORPORATION |
发明人 |
Colgan Evan G.;Nah Jae-Woong |
| 分类号 |
H01L23/18;H01L23/00;H01L25/00;H01L25/07 |
主分类号 |
H01L23/18 |
| 代理机构 |
|
代理人 |
|
| 主权项 |
1. A chip stack, comprising:
two or more chips; a solder joint operably disposed between adjacent ones of the two or more chips, the solder joint occupying about 25-30% or more of an area of the chip stack and comprising a pad having an outer surface disposed outwardly from a conductor and above insulators and an inner surface recessed from the outer surface and disposed in contact with the conductor; and insulating walls disposed on at least one of the two or more chips to separate the solder joint from an adjacent solder joint. |
| 地址 |
Armonk NY US |
