A SYSTEM AND A METHOD FOR DESIGNING A HYBRID MEMORY CELL WITH MEMRISTOR AND COMPLEMENTARY METAL-OXIDE SEMICONDUCTOR

摘要

The embodiments herein relates to a hybrid non-volatile memory cell system and architecture for designing integrated circuits. The system comprises CMOS access transistor (503, 504) connected to a memristor (505) which stores a data based on a resistance. The system has a word line (WL) for accessing the hybrid memory and two bit lines (BL, BLB) carrying data of mutually opposite values for transferring a data from the memory. The two terminals of the transistor (503, 504) are connected respectively to a first terminal of the memristor (505) and to a first bit line (BL, BLB). The gate terminals of the transistor (503, 504) are coupled together to form a word line (WL). The access transistors (503, 504) control the two bit lines (BL, BLB) during a read and write operation. A control logic performs a read and write operation with the hybrid memory cells (500). The memory architecture prevents a power leackage during data storage and controls a drift in a state during a read process.