发明名称 Memory circuit
摘要 While the supply of power is stopped, a data signal that has been held in a volatile memory section can be held in a nonvolatile memory section. In the nonvolatile memory section, a transistor having an extremely low off-state current allows a data signal to be held in the capacitor for a long period of time. Thus, the nonvolatile memory section can hold the logic state even while the supply of power is stopped. When the supply of power is started again, the data signal that has been held in the capacitor while the supply of power has been stopped is set at such a potential that malfunction does not occur by turning on the reset circuit.
申请公布号 US8787083(B2) 申请公布日期 2014.07.22
申请号 US201213365999 申请日期 2012.02.03
申请人 Semiconductor Energy Laboratory Co., Ltd. 发明人 Fujita Masashi
分类号 G11C11/34;G11C14/00;G11C7/00;G11C5/00;G11C5/06;H01L29/788;H01L29/792 主分类号 G11C11/34
代理机构 Fish & Richardson P.C. 代理人 Fish & Richardson P.C.
主权项 1. A semiconductor device comprising: a volatile memory section; and a nonvolatile memory section comprising: a first transistor;a second transistor; anda reset circuit, wherein a gate of the second transistor is electrically connected to one of a source and a drain of the first transistor, and wherein the reset circuit is configured to input an electrical potential which turns off the second transistor to the gate of the second transistor.
地址 Atsugi-shi, Kanagawa-ken JP