发明名称 Nonvolatile semiconductor memory device
摘要 A nonvolatile semiconductor memory device includes a control circuit configured to control a soft program operation of setting nonvolatile memory cells to a first threshold voltage distribution state of the nonvolatile memory cells. When a characteristic of the nonvolatile memory cells is in a first state, the control circuit executes the soft program operation by applying a first voltage for setting the nonvolatile memory cells to the first threshold voltage distribution state to first word lines, and applying a second voltage higher than the first voltage to a second word line. When the characteristic of the nonvolatile memory cells is in a second state, the control circuit executes the soft program operation by applying a third voltage equal to or lower than the first voltage to the first word lines and applying a fourth voltage lower than the second voltage to the second word line.
申请公布号 US8787091(B2) 申请公布日期 2014.07.22
申请号 US201314066875 申请日期 2013.10.30
申请人 Kabushiki Kaisha Toshiba 发明人 Shiino Yasuhiro;Takahashi Eietsu
分类号 G11C16/04;G11C16/10 主分类号 G11C16/04
代理机构 Oblon, Spivak, McClellland, Maier & Neustadt, L.L.P. 代理人 Oblon, Spivak, McClellland, Maier & Neustadt, L.L.P.
主权项 1. A nonvolatile semiconductor memory device, comprising a memory cell array configured as an arrangement of NAND cell units each including a memory string and select transistors connected to both ends of the memory string respectively, the memory string including a plurality of nonvolatile memory cells connected in series; word lines connected to control gate electrodes of the nonvolatile memory cells; bit lines connected to first ends of the NAND cell units; a source line connected to second ends of the NAND cell units; and a control circuit configured to perform a pre-program operation before an erasing operation for the NAND cell units arranged in a block, the NAND cell units that share the word lines forming the block, the control circuit being configured to execute the erasing operation by applying an erasing voltage to the NAND cell units in the block, and to execute the pre-program operation by applying a certain pre-program voltage to first nonvolatile memory cells in the NAND cell units, and by applying a voltage different from the certain pre-program voltage to second nonvolatile memory cells in the NAND cell units, the second nonvolatile memory cells including at least nonvolatile memory cells at the both ends of the memory string.
地址 Minato-ku JP