发明名称 Optimized channel implant for a semiconductor device and method of forming the same
摘要 A semiconductor device, comprising a substrate, a plurality of polysilicon portions formed on the substrate, wherein the polysilicon portions are spaced apart from each other, a plurality of source/drain regions formed in the substrate between adjacent polysilicon portions, and a dielectric layer formed on the polysilicon portions and on the source/drain regions, wherein the dielectric layer includes a cavity filled with conductive material to form a contact area, the contact area overlapping part of a source/drain region and part of a polysilicon portion to electrically connect the polysilicon portion with the source/drain region, and wherein part of the contact area extends below an upper surface of the substrate to contact an implant region with the same doping as the source/drain region. The implant region is next to the source/drain region and includes part of a channel region in the substrate under the polysilicon portion.
申请公布号 US8786026(B2) 申请公布日期 2014.07.22
申请号 US201113029626 申请日期 2011.02.17
申请人 Samsung Electronics Co., Ltd. 发明人 Jung Mukyeng;Chung No Young;Kim Kyung Woo
分类号 H01L27/088;H01L21/336 主分类号 H01L27/088
代理机构 F. Chau & Associates, LLC 代理人 F. Chau & Associates, LLC
主权项 1. A semiconductor device, comprising: a silicon trace doped with a first dopant; an isolation region formed in the silicon trace; a first polysilicon trace formed on the silicon trace; a second polysilicon trace adjacent to the first polysilicon trace and formed on the silicon trace and the isolation region; a source/drain region formed in the silicon trace between the first and the second polysilicon traces, wherein the source/drain region is doped with a second dopant opposite the first dopant; a channel region in the silicon trace under the first polysilicon trace and doped with the first dopant; a doping region formed in the silicon trace and between the source/drain region and the isolation region, wherein the doping region is doped with the second dopant and is partially overlapped by the second polysilicon trace; and a dielectric layer formed on the first and second polysilicon traces and on the source/drain region, wherein the dielectric layer includes a cavity filled with a conductive material to form a contact area, the contact area overlapping part of the source/drain region and the second polysilicon trace to electrically connect the second polysilicon trace with the source/drain region.
地址 Suwon-si, Gyeonggi-do KR