Wafer level packaging using a lead-frame

摘要

Wafer level packaging using a lead-frame. When used to package two or more chips, a final product having QFN package-like finish. The final product will also have a performance rivaling or exceeding that of a corresponding monolithic chip because of the very close connection of the two or more chips and the ability to tailor the fabrication processing of each chip to only that required for the devices on that chip. The wafer level packaging can also be used to package monolithic chips, as well as chips having active devices on one chip and passive devices on a second chip. Various exemplary embodiments are disclosed.

主权项

1. A method of wafer level packaging comprising:
a) fabricating a first wafer with a repetitive matrix of first circuits thereon and having a corresponding pattern of circuit contacts on a first surface thereof; b) fabricating a lead frame matrix having a repetitive pattern of lead frames and lead frame contacts for electrically connecting to the circuit contacts on the first wafer; c) electrically connecting the lead frame contacts on the lead frame matrix to the circuit contacts on the first wafer; etching the lead frame matrix to separate the lead frame contacts; d) dicing the first wafer.