发明名称 Thermal stress reduction in aircraft motor controllers
摘要 A thermal stress reduction method includes ramping an electric power generator to start an aircraft engine, for a time period associated with the aircraft engine start sequence toggling a three-level inverter switch array to a three-level pulse width modulation mode, determining if a first time interval in the three-level pulse width modulation mode exceeded a predetermined three-level pulse width modulation mode interval, in response to the first time interval exceeding the three-level pulse width modulation mode interval, toggling the three-level inverter switch array to a two-level pulse width modulation mode, determining if a second time interval in the two-level pulse width modulation mode exceeded a predetermined two-level pulse width modulation mode interval and in response to the second time interval exceeding the two-level pulse width modulation mode interval, toggling the three-level inverter switch array to the three-level pulse width modulation mode.
申请公布号 US8786232(B2) 申请公布日期 2014.07.22
申请号 US201213451644 申请日期 2012.04.20
申请人 Hamilton Sundstrand Corporation 发明人 Chai Huazhen;White Adam M.;Kheraluwala Mustansir
分类号 H02P1/04 主分类号 H02P1/04
代理机构 Cantor Colburn LLP 代理人 Cantor Colburn LLP
主权项 1. A thermal stress reduction method for an aircraft motor controller having a three-level inverter switch array, and configured to control an electric power generator coupled to an aircraft engine, the method comprising: ramping the electric power generator to start an aircraft engine; during a time period associated with an aircraft engine start sequence: toggling the three-level inverter switch array to a three-level pulse width modulation (PWM) mode;determining if a first time interval in the three-level PWM mode exceeds a predetermined three-level PWM mode interval;toggling the three-level inverter switch array to a two-level PWM mode, in response to the first time interval exceeding the three-level PWM mode interval;determining if a second time interval in the two-level PWM mode exceeds a predetermined two-level PWM mode interval; andtoggling the three-level inverter switch array to the three-level PWM mode, in response to the second time interval exceeding the two-level PWM mode interval, wherein the three-level inverter switch array includes a first switch, a second switch, a third switch and a fourth switch, wherein the first switch, the second switch, the third switch and the fourth switch are configured in a serial arrangement, the three-level PWM mode includes alternating between switching on the first switch and the third switch while applying a PWM signal to the second switch and the fourth switch, and switching on the second switch and the fourth switch while applying a PWM signal to the first switch and the third switch, the two-level PWM mode includes turning on the first switch and the fourth switch while applying a PWM signal to the second switch and the third switch, and a carrier frequency in the two-level PWM mode is greater than a carrier frequency in the three-level PWM mode.
地址 Windsor Locks CT US