发明名称 Methods and apparatus for soft demapping and intercell interference mitigation in flash memories
摘要 Methods and apparatus are provided for soft demapping and intercell interference mitigation in flash memories. In one variation, a target cell in a flash memory device capable of storing at least two data levels, s, per cell is read by obtaining a measured read value, r, for at least one target cell in the flash memory; obtaining a value, h, representing data stored for at least one aggressor cell in the flash memory; selecting one or more probability density functions based on a pattern of values stored in at least a portion of the flash memory, wherein the probability density functions comprises pattern-dependent disturbance of one or more aggressor cells on the at least one target cell in the flash memory; evaluating at least one selected probability density function based on the measured read value, r; and computing one or more log likelihood ratios based on a result of the evaluating step.
申请公布号 US8788923(B2) 申请公布日期 2014.07.22
申请号 US200913001317 申请日期 2009.06.30
申请人 LSI Corporation 发明人 Haratsch Erich F.;Ivkovic Milos;Krachkovsky Victor;Miladinovic Nenad;Vityaev Andrei;Yen Johnson
分类号 G06F11/00;H03M13/00;G11C16/34;G11C5/00;G06F11/10 主分类号 G06F11/00
代理机构 Ryan, Mason & Lewis, LLP 代理人 Ryan, Mason & Lewis, LLP
主权项 1. A method for reading a target cell in a flash memory device capable of storing at least two data levels, s, per cell, said method comprising: obtaining a measured read value, r, for at least one target cell in said flash memory; evaluating at least one probability density function based on said measured read value, r, wherein said probability density function indicates a probability of measuring a read value, r, for a given data level, s; and computing one or more log likelihood ratios based on a result of said evaluating step; wherein said computing step further comprises the step of: aggregating for each of two possible binary values said probability of measuring a read value, r, for a given data level, s, for multiple data levels associated with said two possible binary values.
地址 San Jose CA US
您可能感兴趣的专利