发明名称 Double-buffered data storage to reduce prefetch generation stalls
摘要 A prefetch unit includes a program prefetch address generator that receives memory read requests and in response to addresses associated with the memory read request generates prefetch addresses and stores the prefetch addresses in slots of the prefetch unit buffer. Each slot includes a buffer for storing a prefetch address, two data buffers for storing data that is prefetched using the prefetch address of the slot, and a data buffer selector for alternating the functionality of the two data buffers. A first buffer is used to hold data that is returned in response to a received memory request, and a second buffer is used to hold data from a subsequent prefetch operation having a subsequent prefetch address, such that the data in the first buffer is not overwritten even when the data in the first buffer is still in the process of being read out.
申请公布号 US8788759(B2) 申请公布日期 2014.07.22
申请号 US201113223237 申请日期 2011.08.31
申请人 Texas Instruments Incorporated 发明人 Pierson Matthew D;Zbiciak Joseph R M
分类号 G06F9/38;G06F12/08 主分类号 G06F9/38
代理机构 代理人 Marshall, Jr. Robert D.;Telecky, Jr. Frederick J.
主权项 1. A method for generating memory prefetches in caching systems, comprising: generating prefetch addresses in response to addresses associated with memory read requests; storing the prefetch addresses in slots of a prefetch buffer, wherein each slot includes a buffer for storing a prefetch address, a first data buffer and second data buffer for storing data that is prefetched using the prefetch address stored in the slot, and a data buffer selector for alternating a designation of the first and second buffers; allocating a slot associated with a next predicted address in accordance with an order in which a prefetch FIFO counter is modified to cycle through the slots of an array of slots before wrapping around to a first slot of the array for storing portions of predicted addresses; in the allocated slot, reading data from the first data buffer, and storing subsequent data from a subsequent prefetch operation having a subsequent prefetch address in the second data buffer before completing the operation of reading the data in the first buffer; and alternating the designation of the first and second buffers by modifying the state of the data buffer selector after the subsequent data has been stored in the second data buffer.
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