发明名称 Video control device and video control method
摘要 A first quantization unit quantizes data of each pixel constituting a first frame data by a first logical formula to generate a second frame data with a predetermined number of lower bits deleted. A delay memory temporarily holds the second frame data and outputs third frame data. Interpolation unit generates interpolated frame data located between adjacent frames in the second frame data by using the second frame data and the third frame data. A second quantization unit quantizes data of each pixel constituting the first frame data by a second logical formula different from the first logical formula to generate a fourth frame data with a predetermined number of lower bits deleted. A frame memory temporarily holds the fourth frame data and the interpolated frame data, and outputs the fourth frame data and the interpolated frame data alternately at a second frame rate higher than the first frame rate.
申请公布号 US8786774(B2) 申请公布日期 2014.07.22
申请号 US201313766132 申请日期 2013.02.13
申请人 JVC Kenwood Corporation 发明人 Aiba Hideki
分类号 H04N7/01;H04N11/20;H04N5/00;H04N3/14;H04N7/12;H04N11/02;H04N11/04 主分类号 H04N7/01
代理机构 Nath Goldberg & Meyer 代理人 Nath Goldberg & Meyer ;Meyer Jerald L.
主权项 1. A video control device for a hold-type display, comprising: a data acquisition unit configured to acquire first frame data having a first frame rate; a first quantization unit configured to quantize data of each pixel constituting the first frame data by a first logical formula to generate a second frame data with a predetermined number of lower bits deleted; a delay memory configured to temporarily hold the second frame data and output third frame data obtained by delaying the second frame data; one or a plurality of interpolation units configured to generate one or a plurality of sets of interpolated frame data located between adjacent frames in the second frame data by using the second frame data and the third frame data; one or a plurality of second quantization units configured to quantize data of each pixel constituting the first frame data or the interpolated frame data by a second logical formula different from the first logical formula to generate a fourth frame data with a predetermined number of lower bits deleted; a frame memory configured to temporarily hold the fourth frame data and the interpolated frame data; and a frame controller configured to control reading of the fourth frame data and the interpolated frame data from the frame memory to repeatedly output the fourth frame data and the interpolated frame data sequentially from the frame memory at a second frame rate higher than the first frame rate, wherein the number of the first quantization unit and the second quantization unit in total is at least 2M, or the ratio of the second frame rate to the first frame rate is 2M, where M is the number of deleted lower bits.
地址 Yokohama-Shi, Kanagawa JP