发明名称 Systems and methods for accessing a multi-bank SRAM
摘要 A device may include multi-bank SRAM logic configured to receive an lookup result that includes a first number of addresses, parse each of the first number of addresses from the received lookup result, simultaneously provide at least one of the first number of parsed addresses to each of a first number of SRAMs, simultaneously read data from each of the first number of SRAMs and simultaneously transmit the read data from each of the first number of SRAMs.
申请公布号 US8787376(B1) 申请公布日期 2014.07.22
申请号 US200812049656 申请日期 2008.03.17
申请人 Juniper Networks, Inc. 发明人 Aybay Gunes
分类号 H04L12/28 主分类号 H04L12/28
代理机构 Harrity & Harrity, LLP 代理人 Harrity & Harrity, LLP
主权项 1. A device comprising: at least one processor to: store, in a plurality of static random access memories (SRAMs), respective portions of data associated with a flow,store, in a ternary content addressable memory (TCAM), that differs from the plurality of SRAMs, information identifying a plurality of addresses in the plurality of SRAMs, the plurality of addresses being associated with, respectively, the stored portions of the data,receive a packet,extract information from the packet,form, based on the extracted information, a lookup key,access, using the lookup key, the TCAM to acquire a lookup result that includes the information identifying a group of addresses, of the plurality of addresses, a quantity of addresses included in the group of addresses being equal to a quantity of SRAMs included in the plurality of SRAMs,parse the lookup result to identify the group of addresses,simultaneously access, using the group of addresses, the plurality of SRAMs, to simultaneously read the portions of the data from the plurality of SRAMs, andprocess the packet using the read portions of the data.
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