Devices and methods for bit error rate monitoring of intra-panel data link

摘要

Devices and methods for monitoring a bit error rate of an intra-panel data link (e.g., a chip-on-glass (COG) data link) between a timing controller and a display driver circuitry, according to an embodiment. The timing controller may send test data over a data link to the display driver circuitry. The test data may include a known or predictable stream of data. The display driver circuitry may receive the test data via the data link and detect bit errors based at least partly on the test data. An indication of the bit errors may be displayed on an array of pixels of the display or provided to the timing controller via a separate back channel data link.

主权项

1. An electronic display comprising:
a timing controller configured to transmit test data over at least one data link, wherein the test data comprises a known or predictable stream of data, wherein the timing controller comprises pseudorandom binary sequence generating circuitry to generate the pseudorandom binary sequence; and display driver circuitry configured to receive the test data via the at least one data link and detect bit errors associated with the at least one data link based at least in part on the test data, wherein the display driver circuitry comprises pseudorandom binary sequence check circuitry configured to detect the bit errors associated with the at least one data link based at least in part on the test data.