| 发明名称 | Distortion compensation device and distortion compensating method | ||
| 摘要 | A distortion compensation device which reduces a distortion of an amplifier which is added to an output signal of the amplifier, the distortion compensation device including: a plurality of distortion compensation coefficient storage circuits which stores a plurality of distortion compensation coefficients and outputs the distortion compensation coefficients according to an amplitude of an input signal of the amplifier, a distortion compensating processing circuit which adds the distortion compensation coefficient output from each of the plurality of distortion compensation coefficient storage circuits to the input signal of the amplifier, and a distortion compensation coefficient updating circuit which performs weighting processing on the distortion compensation coefficient output from each of the plurality of distortion compensation coefficient storage circuits to reduce the distortion compensation coefficient and which calculates an update value of the distortion compensation coefficient by using the distortion compensation coefficient which is subjected to the weighting processing. | ||
| 申请公布号 | US8787487(B2) | 申请公布日期 | 2014.07.22 |
| 申请号 | US201213461928 | 申请日期 | 2012.05.02 |
| 申请人 | Fujitsu Limited | 发明人 | Nagatani Kazuo;Ishikawa Hiroyoshi;Fudaba Nobukazu;Utsunomiya Yuichi |
| 分类号 | H04L27/10;H04J3/16;G01V3/38;H04L25/49 | 主分类号 | H04L27/10 |
| 代理机构 | Staas & Halsey LLP | 代理人 | Staas & Halsey LLP |
| 主权项 | 1. A distortion compensation device which reduces a distortion of an amplifier which is added to an output signal of the amplifier, the distortion compensation device comprising: a plurality of distortion compensation coefficient storage circuits which stores a plurality of distortion compensation coefficients and outputs the distortion compensation coefficients according to an amplitude of an input signal of the amplifier; a distortion compensating processing circuit which adds the distortion compensation coefficient output from each of the plurality of distortion compensation coefficient storage circuits to the input signal of the amplifier; and a distortion compensation coefficient updating circuit which performs weighting processing on the distortion compensation coefficient output from each of the plurality of distortion compensation coefficient storage circuits to reduce the distortion compensation coefficient and which calculates an update value of the distortion compensation coefficient by using the distortion compensation coefficient which is subjected to the weighting processing. | ||
| 地址 | Kawasaki JP | ||