发明名称 SIGNAL PROCESSING APPARATUS AND SIGNAL PROCESSING METHOD
摘要 PROBLEM TO BE SOLVED: To provide a signal processing apparatus and signal processing method capable of suppressing an influence of an error while suppressing the number of bits.SOLUTION: The signal processing apparatus includes: a multiplier that obtains a mapping coefficient by multiplying a tap coefficient by 1/√2 and a converter that converts a digital input signal into a value of the tap coefficient×QPSK modulation point by multiplying the mapping coefficient by the digital input signal.
申请公布号 JP2014132714(A) 申请公布日期 2014.07.17
申请号 JP20130000310 申请日期 2013.01.07
申请人 FUJITSU LTD 发明人 YAMAZAKI MANABU
分类号 H04L27/20;H03H17/00;H03H17/02 主分类号 H04L27/20
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