发明名称 |
SYSTEM ON CHIP INCLUDING MEMORY MANAGEMENT UNIT, AND MEMORY ADDRESS TRANSLATION METHOD AND ELECTRONIC SYSTEM THEREOF |
摘要 |
<p>PROBLEM TO BE SOLVED: To provide: a system on chip including a memory management unit that enhances the hit rate of a physical address; and a memory address translation method and an electronic system thereof.SOLUTION: A system on chip includes a master IP to output a request corresponding to each working set in order to operate for a plurality of working sets; an MMU module comprising a plurality of MMUs, each of which is allocated for one of the working sets to translate virtual addresses corresponding to the request into physical addresses; a first bus interconnect to connect the MMU module with a memory device and to transmit the request, on which address translation has been performed in at least one of the plurality of MMUs, to the memory device; and a second bus interconnect to connect the master IP with the MMU module and to allocate one of the plurality of MMUs for each of the working sets.</p> |
申请公布号 |
JP2014132467(A) |
申请公布日期 |
2014.07.17 |
申请号 |
JP20140001170 |
申请日期 |
2014.01.07 |
申请人 |
SAMSUNG ELECTRONICS CO LTD |
发明人 |
KIM SEOK MIN ; KIM KWAN HO ; KIM SUNG WOON ; KIM TAE-SUN ; LIM KYOUNGMOOK |
分类号 |
G06F12/10 |
主分类号 |
G06F12/10 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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