| 发明名称 |
SCAN CIRCUIT, SEMICONDUCTOR DEVICE, AND METHOD FOR TESTING SEMICONDUCTOR DEVICE |
| 摘要 |
A semiconductor device includes: a combination circuit; and a scan circuit, wherein the scan circuit includes: a first scan chain in which a plurality of first flip-flops are connected in series; and a second scan chain in which a plurality of second flip-flops are connected in series. The first scan chain is configured to capture first output data of at least one of the first flip-flops of the second scan chain, and the second scan chain is configured to capture second output data of at least one of the second flip-flops of the first scan chain. |
| 申请公布号 |
US2014201582(A1) |
申请公布日期 |
2014.07.17 |
| 申请号 |
US201314072448 |
申请日期 |
2013.11.05 |
| 申请人 |
FUJITSU SEMICONDUCTOR LIMITED |
发明人 |
MIKI Kouji |
| 分类号 |
G01R31/3177 |
主分类号 |
G01R31/3177 |
| 代理机构 |
|
代理人 |
|
| 主权项 |
1. A scan circuit comprising:
a first scan chain in which a plurality of first flip-flops are connected in series; and a second scan chain in which a plurality of second flip-flops are connected in series, wherein the first scan chain is configured to capture first output data of at least one of the first flip-flops of the second scan chain, and the second scan chain is configured to capture second output data of at least one of the second flip-flops of the first scan chain. |
| 地址 |
Yokohama JP |
