CHARGE PUMP AND METHOD OF BIASING DEEP N-WELL IN CHARGE PUMP

摘要

A charge pump has at least one charge pump stage. Each charge pump stage includes at least one NMOS device. The at least one NMOS device has a deep N-well (DNW), a gate and a drain, and is coupled to at least one capacitor, a first node, a second node and a switch. For the at least one NMOS device, the gate is capable of receiving a different signal from the drain. The first node is arranged to receive an input signal. The switch is coupled between the at least one NMOS device and a ground. A drain of the switch is coupled to a deep N-well of the switch. The at least one capacitor is arranged to store electrical charges. The charge pump stage is configured to supply the electrical charges to the second node. The DNW is coupled to the ground for a negative pump operation.

主权项

1. A charge pump having at least one charge pump stage, each charge pump stage comprising:
at least one NMOS device having a deep N-well (DNW), wherein a gate of the at least one NMOS device is capable of receiving a different signal from a drain of the at least one NMOS device; at least one capacitor coupled to the at least one NMOS device; a switch coupled between the at least one NMOS device and a ground, wherein a drain of the switch is coupled to a deep N-well of the switch; a first node coupled to the at least one NMOS device; and a second node coupled to the at least one NMOS device, wherein the first node is arranged to receive an input signal, the at least one capacitor is arranged to store electrical charges, the charge pump stage is configured to supply the electrical charges to the second node, and the DNW is arranged to be coupled to the ground for a negative pump operation.