Presenting multi-function devices behind a switch hierarchy as a single function device

摘要

In one embodiment, a computer system, comprises at least one host node, at least one input/output node coupled to the host node, at least one multi-function device coupled to the input/output node via a switch, and a middle manager processor comprising logic to block an enumeration process in a host node for the multi-function devices behind the switch hierarchy, initiate an enumeration process for the multi-function devices in a manager processor separate from the host node, store a routing table for the switch hierarchy in a memory module coupled to the manager processor, and allocate, in the manager processor, endpoint device resources to the host node.

主权项

1. A method, comprising:
blocking a first enumeration process in a first host node for a multi-function device behind a switch; blocking a second enumeration process in a second host node for the multi-function device behind the switch; initiating a third enumeration process for the multi-function device in a manager processor separate from the first host node, the second host node and the switch, the third enumeration process causing a first function of the multi-function device to be presented to the first host node as a first single function device and a second function of the multi-function device to be presented to the second host node as a second single function device; determining, at the manager processor, based on a message from the switch, that the first single function device generated a first interrupt and the second single function device generated a second interrupt; configuring an input/output node to convert an incoming type 0 configuration cycle from the manager processor to a type 1 configuration cycle; and generating, in response to the determination, at the manager processor, a third interrupt to the first host node and a fourth interrupt to the second host node based on a routing table stored in a memory module in communication with the manager processor, the routing table mapping the first single function device to the first host node and the second single function device to the second host node.