发明名称 |
Semiconductor memory device |
摘要 |
In the semiconductor memory device, one of a source and a drain of a first transistor is connected to one of a source and a drain of a second transistor, a gate of the first transistor is connected to one of a source and a drain of a third transistor and one of a pair of capacitor electrodes included in a capacitor, the other of the source and the drain of the first transistor and the other of the source and the drain of the third transistor are connected to a bit line, the other of the pair of capacitor electrodes included in the capacitor is connected to a common wiring, and the common wiring is grounded (GND). The common wiring has a net shape when seen from the above, and the third transistor is provided in a mesh formed by the common wiring. |
申请公布号 |
US8779488(B2) |
申请公布日期 |
2014.07.15 |
申请号 |
US201213443027 |
申请日期 |
2012.04.10 |
申请人 |
Semiconductor Energy Laboratory Co., Ltd. |
发明人 |
Saito Toshihiko |
分类号 |
H01L27/108 |
主分类号 |
H01L27/108 |
代理机构 |
Fish & Richardson P.C. |
代理人 |
Fish & Richardson P.C. |
主权项 |
1. A semiconductor memory device comprising:
a first transistor; a second transistor; a third transistor comprising an oxide semiconductor film; and a capacitor comprising:
a conductive film facing side surfaces of one of a source electrode and a drain electrode of the third transistor; anda first insulating film between the conductive film and the one of the source electrode and the drain electrode of the third transistor, wherein one of a source and a drain of the first transistor is electrically connected to one of a source and a drain of the second transistor, and wherein the one of the source electrode and the drain electrode of the third transistor is electrically connected to a gate electrode of the first transistor. |
地址 |
Atsugi-shi, Kanagawa-ken JP |